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High speed low power analysis of mixed logic line decoder using 45GPDK Technology.By Keesari Akshitha, S. K. Masthan Basha
Abstract: A huge challenge faced by this era of development is power reduction. The low power circuit designs are a requesting issue in high performance digital frameworks, for example, microchips, DSPs, and other different applications. Power and speed are the main highlights considered when comparing any circuit or design. The diminishing chip area is additionally truly impressive factor, creators need to recall when suggesting any novel design. 2×4 Decoder Using 12 …
Published in International Journal of Analog Integrated Circuits · Vol. 9, Issue 2, 2023 · pp. 1–9 Read article →