FPGA Improved I2C Protocol for Multiple Slave Device Using VHDL

Volume: 11 | Issue: 01 | Year 2025 | Subscription
International Journal of Microelectronics and Digital integrated circuits
Received Date: 02/15/2025
Acceptance Date: 02/20/2025
Published On: 2025-04-04
First Page: 1
Last Page: 9

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By: Aditya Mishra and Shashilata Ravat

1- Assistant Professor, Department of. Electronics and Communication Engineering, Vidyapeeth Institute of Science & Technology, Bhopal, Madhya Pradesh, India
2- Assistant Professor, Department of. Electronics and Communication Engineering, Vidyapeeth Institute of Science & Technology, Bhopal, Madhya Pradesh, India

Abstract

RTC, EEPROM, and an OV7620 image sensor are the slave devices that interact with the FPGA in this case (functioning as the I2C master device). Using the VHDL language, the process proceeds from system definition to functional design. The thesis presents the findings of simulated waveforms used for design verification. Additionally, hardware verification is carried out, and useful outcomes are shown. The results are compared with earlier reference work in the field after efficient architecture for numerous device interfaces on a single I2C bus has been developed. A computer or graphics system that uses an 8-bit data width is referred to as 8-bit. It simply indicates that eight binary digits, or bits, can be used by the system to process and represent information. This usually enables the representation of 256 distinct values, ranging from 0 to 255. One of the most popular serial communication protocols for short-distance communication is I2C. It facilitates easy and reliable connection between the microcontroller and the peripheral device. The two wires that make up the I2C Protocol—SDA and SCL—are used for bidirectional synchronous serial bus communication.

Keywords: I2C bus, communication, 8-bit transmission, EEPROM, SCL, SDA, and other inter-integrated circuits

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Citation:

How to cite this article: Aditya Mishra and Shashilata Ravat, FPGA Improved I2C Protocol for Multiple Slave Device Using VHDL. International Journal of Microelectronics and Digital integrated circuits. 2025; 11(01): 1-9p.

How to cite this URL: Aditya Mishra and Shashilata Ravat, FPGA Improved I2C Protocol for Multiple Slave Device Using VHDL. International Journal of Microelectronics and Digital integrated circuits. 2025; 11(01): 1-9p. Available from:https://journalspub.com/publication/ijmdic/article=15988

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