IMPLEMENTATION OF VOTING MACHINE TO AVOID RIGGING USING VERILOG HDL

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Volume: 12 | Issue: 01 | Year 2026 | Subscription
International Journal of Microelectronics and Digital integrated circuits
Received Date: 04/09/2026
Acceptance Date: 05/08/2026
Published On: 2026-05-25
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By: A.S.S Venkata Sai, CH.Chandrasekhar, D. Vinayak, A.Venkata Satya Ghani, A.A.Venkata Satya Sai, and S.N.Bharghavi.

1,2,3,4,5. Student, Department of Electronics and Communications Engineering, Bonam Venkata Chalamayya Engineering College (Autonomous), Odalarevu, Andhra Pradesh, India

6.Professor, Department of Electronics and Communication Engineering, Bonam Venkata Chalamayya Engineering College (Autonomous), Odalarevu, Andhra Pradesh, India

Abstract

With almost 970 million eligible voters, India holds the title of the largest democratic nation. The traditional voting method that used paper was a lengthy process and highly susceptible to mistakes. Electronic voting machines (EVMs) make voting easy, safe, and quick. It decreases the human effort, errors in the time of vote counting. But in the existing EVM there is lack of authentication, i,e one’s vote can be stolen by another person so there by increasing the false leaders which is the major disadvantage for democracy. The suggested electronic voting machine is equipped with a fingerprint verification procedure. It contains a fingerprint database of eligible voters, ensuring that only they can vote. This EVM is standalone machine it is not connected to the any internet it can’t be hacked. Verilog hardware description language (HDL) is used in the design. The EVM is designed using Verilog code with the Xilinx Vivado 2024.1 tool and can also be implemented on an FPGA board for real-time applications. It improves voter authentication, ensures secure access control, prevents impersonation, enhances data integrity, supports reliable operation, enables efficient vote management, increases transparency, builds citizen trust, strengthens election credibility, ensures accurate results, promotes fairness, and effectively safeguards the democratic electoral process. This system improves robustness, scalability, and operational efficiency in large-scale elections while upholding strict security and reliability standards throughout all phases of the voting process.

Keywords – Electronic Voting Machine (EVM), Biometric Authentication, Hardware Cryptography, Verilog HDL / FPGA Implementation, Secure Voting System

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Citation:

How to cite this article: A.S.S Venkata Sai, CH.Chandrasekhar, D. Vinayak, A.Venkata Satya Ghani, A.A.Venkata Satya Sai, and S.N.Bharghavi IMPLEMENTATION OF VOTING MACHINE TO AVOID RIGGING USING VERILOG HDL. International Journal of Microelectronics and Digital integrated circuits. 2026; 12(01): -p.

How to cite this URL: A.S.S Venkata Sai, CH.Chandrasekhar, D. Vinayak, A.Venkata Satya Ghani, A.A.Venkata Satya Sai, and S.N.Bharghavi, IMPLEMENTATION OF VOTING MACHINE TO AVOID RIGGING USING VERILOG HDL. International Journal of Microelectronics and Digital integrated circuits. 2026; 12(01): -p. Available from:https://journalspub.com/publication/ijmdic/article=25848

Refrences:

  1. Baligatti DU, Desai A, Wali U. Free-Area-Estimator-for-Simulated- Annealing-of-VLSI-Floor-Plans. International Journal of Innovative Research in Computer Science and Technology (IJIRCST). 2014 Jul;2(4):52-5.
  2. Ojha M, Sikka R. An overview on applications of microcontroller. Int J Innov Res Eng Manag. 2021 Nov;8(6):4020-5.
  3. Foster I, Kesselman C, Nick JM, Tuecke S. The physiology of the grid. Grid computing: making the global infrastructure a reality. 2003 Mar 11:217-49.
  4. Swapna T, Devi DA, Gupta M. Digital Electronic Voting Machine Using Verilog. InDisruptive technologies in Computing and Communication Systems 2024 Jun 24 (pp. 425-431). CRC Press.
  5. Clark J, Essex A, Adams C. Secure and observable auditing of electronic voting systems using stock indices. In2007 Canadian Conference on Electrical and Computer Engineering 2007 Apr 22 (pp. 788-791). IEEE.
  6. Harsha LC, Bharatula SD, Reddy BN, Sarangam K. Design and Implementation of a Secure and Accurate Electronic Voting Machine using Verilog on Zynq FPGA. Journal of Mobile Multimedia. 2025 Jul;21(3-4):505-20.
  7. Kumar A. FPGA-Implementation of Electronic Voting Machine (EVM). Majlesi Journal of Telecommunication Devices. 2025 Mar 1;14(1).
  8. Keerthi T, Chinnaiah MC, Kumari A, Asharani P, Harikrishna D, Divyavani G. Real Time Implementation of Biometric-based EVM System for Distinct Verification. Procedia Computer Science. 2023 Jan 1;230:407-16.
  9. Punith MS, Shukla R, Yadav S. Blockchain based electronic voting machine. In2022 International Conference on Edge Computing and Applications (ICECAA) 2022 Oct 13 (pp. 479-483). IEEE.
  10. Scott SD, Seth S, Samal A. A synthesizable VHDL coding of a genetic algorithm. InPractical Handbook of Genetic Algorithms 2019 Sep 17 (pp. 239- 268). CRC Press.